Dec 14, 20232 minZC702Extract (read back) configuration data from a Zynq-7000 FPGAIntroduction This article will show you how to use Vivado to read back the bitstream programmed into a physical Zynq-7000 device. The...
Jul 10, 20233 minZC702Use ZC702 serial and JTAG in a VMWare Ubuntu 22.04.1 VM on VMware Workstation 16 Pro on Windows 10This post shows how to use ZC702 serial and JTAG in a VMWare Ubuntu 22.04.1 VM on VMware Workstation 16 Pro running on Windows 10. It...
Jul 9, 20232 minZC702Run the Xilinx ZC702 Built-In Self-Test on Windows 10This post shows how to run the Xilinx ZC702 Built-In Self-Test on Windows 10. It follows the original instructions included in the kit...
Sep 14, 20207 minZC702Zynq-7000 + AXI Slave CDMA controller on a ZC702This post lists step-by-step instructions for creating an AXI slave Central Data Management Access (CDMA) controller, integrating the...
May 7, 20195 minZynq-7000 Hello WorldZynq-7000 + AXI Slave with Interrupt Hello World on a ZC702This post lists step-by-step instructions for creating an AXI slave with an interrupt using Vivado HLS, integrating the slave into a...
May 3, 20195 minZynq-7000 Hello WorldZynq-7000 + AXI Slave Hello WorldThis post shows how to create a Xilinx Zynq-7000 + AXI slave in Vivado 2018.2 and read/write the AXI slave from the ARM9 of the Zynq-7000...