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  • Create a Versal PLM project and build it with Vitis Classic

    This post shows how to create a Versal PLM with Vitis Classic (versions ≤2023.1, or 2023.2 when launched with the `-classic` command line argument). If you'd like to do this on the command line with XSCT, refer to this post instead. After creating the PLM, follow the instructions in this next post to create a bootable image from it and launch it on hardware. 1) Launch Vitis $ source /tools/Xilinx/Vitis/2023.2/settings64.sh $ vitis (versions 2023.1 and earlier) $ vitis -classic (versions 2023.2 and later) 2) Select your workspace directory and create a new application project Click on Create Application Project and skip the welcome screen in the dialog that pops up. Select the hardware platform. Use the dropdown box to select vck190 or other Xilinx dev kits; otherwise, use the ‘Browse’ button to pick the XSA file that you exported from Vitis or that your board’s manufacturer provided. The Platform Name field will get filled in automatically; leave it at the default and click Next. Enter an application project name – “plm” will work fine. The system project name will be automatically filled in. Select versal_cips_0_pspmc_0_psv_pmc_0 as the processor. Leave other settings at the default and click next. Click Next on the Domain page - no changes needed here. Select “versal PLM” as the application template and click Finish. 1) Modify and build the PLM Vitis will open the PLM project. Open xplm_main.c from the left sidebar. Add a new XPlmi_Printf to distinguish this from the default PLM: XPlmi_Printf(DEBUG_PRINT_ALWAYS, "This is my Vitis PLM!\n\r"); Right click the “plm” project (the first child of “plm_system”) and build it. The console will show this when the build is finished: The built PLM ELF will be present in the Vitis workspace directory at plm/Debug/plm.elf. Next, follow the steps in this post to pack this PLM into a boot image and boot it on hardware. References Header image from https://www.xilinx.com/products/silicon-devices/acap/versal-ai-core.html#video

  • Flip-Chip (1.0 mm)?

    This post answers flip-chip (1.0 mm)? In other words, what does "flip-chip" mean, and why is 1.0 mm important? It also provides links to additional flip-chip resources. Flip-Chip (1.0 mm)? Flip-chip technology is a method used in the manufacturing of integrated circuits (ICs) and electronic devices. The term "flip-chip" refers to the process of mounting semiconductor chips directly onto a substrate or another chip, with their active surface facing downwards. This is in contrast to the traditional method of mounting chips with their active surface facing upwards. The "1.0 mm" designation in "Flip-Chip (1.0 mm)" refers to the "pitch," the distance between the center of one bump or solder ball and the center of the adjacent one. A pitch of 1.0 mm means the bumps or solder balls on the flip-chip package are spaced 1.0 mm apart. Flip-Chip Package Technology Advantages Flip-chip technology offers several advantages over conventional packaging methods, including: Improved electrical performance: Because the electrical connections are shorter and more direct, flip-chip configurations can offer better electrical performance compared to wire-bonded packages. Enhanced thermal performance: The direct attachment of the chip to the substrate or another chip allows for better heat dissipation, which is crucial for high-performance applications where heat management is critical. Higher packing density: Flip-chip configurations typically allow for a higher density of interconnects compared to wire-bonded packages, enabling more functionality to be packed into a smaller footprint. Reduced inductance: The shorter interconnect lengths in flip-chip configurations result in lower inductance, which can be advantageous for high-speed and high-frequency applications. Flip-chip technology has become increasingly popular in the semiconductor industry due to these and other benefits for a wide range of applications, from consumer electronics to high-performance computing. Flip-Chip Package Technology Drawbacks Cost: Flip-chip packaging can be more expensive than traditional packaging methods, primarily due to the additional manufacturing steps involved, such as the deposition of under-bump metallization (UBM) layers and the need for more precise alignment during assembly. Complexity: The design and manufacturing process for flip-chip packages can be more complex than traditional packaging methods, requiring specialized equipment and expertise. This complexity can result in longer development times and higher initial costs. Reliability concerns: Flip-chip packages are more susceptible to certain reliability issues, such as solder joint fatigue and cracking, especially in applications with thermal cycling or mechanical stress. Careful design and material selection are necessary to mitigate these reliability concerns. Testing challenges: Testing flip-chip packages can be more challenging compared to traditional packages, as access to the chip's active surface may be limited once it is mounted. Specialized testing methods and equipment may be required to ensure the quality and functionality of flip-chip devices. Thermal management: While flip-chip configurations offer improved thermal performance compared to wire-bonded packages, proper thermal management is still crucial, especially for high-power applications. Inadequate heat dissipation can lead to thermal issues such as overheating and reduced reliability. Despite these drawbacks, flip-chip technology is widely used in the semiconductor industry, where its benefits outweigh the drawbacks. Ongoing advancements in materials, design techniques, and manufacturing processes aim to mitigate drawbacks and further improve the performance and reliability of flip-chip packages. More Info Wikipedia Flip-Chip [ live ] [ cached ] Versal Adaptive SoC Packaging and Pinouts Architecture Manual (AM013) [ live ] [ cached ] Xilinx Advanced Packaging [ live ] [ cached ] Note: All docs cached on 2024-05-03

  • Dell Inspiron 16 7620 2-in-1 Docs

    This post links to Dell Inspiron 16 7620 2-in-1 docs in their location as of 2024-04-19 and a saved version. It was explicitly item number 210-BDFG. It also contains the price paid and a table of specifications. Docs Price Price on 2024-08-22: $1,690.97 Specifications Benchmark https://www.videocardbenchmark.net/video_lookup.php?gpu=GeForce+MX550&id=4493 GeForce MX550 Specs Technologies NVIDIA® Optimus® technology NVIDIA GPU Boost™ NVIDIA® Game Ready Drivers NVIDIA® CUDA® technology PCI Express 4.0 Microsoft DirectX® 12 Vulkan 1.2 support OpenGL 4.6 support OpenCL™ 3.0 support

  • Running a local Xilinx license server to use a floating license

    If you have a node-locked license, you can add it to ~/.Xilinx/Xilinx.lic to make it active. However, floating licenses require running a license server. First, acquire the Xilinx.lic file that contains your floating license. Near the top of the file, there will be a line that specifies the license server: SERVER 2100 USE_SERVER This hostname & MAC should match that of your computer. Launch the local license server: /tools/Xilinx/Vitis/2023.2/bin/unwrapped/lnx64.o/lmgrd -c ~/.Xilinx/Xilinx.lic A debug log will be printed in the terminal. Alternatively, use the “-l /path/to/debug.log” argument to log to a file. It may take 10-15 seconds for the server to start up fully. If you get a “lmgrd: No such file or directory” error, resolve it with: sudo apt install lsb Reference: https://support.xilinx.com/s/article/59876?language=en_US

  • Create a Versal boot image and launch PLM on hardware

    Once you’ve created a PLM elf (with XSCT or with Vitis), the next step is to create a boot image from it, and then boot it on hardware (using JTAG in this example). In this post, we’ll use the Trenz TE0950 board as the target hardware, though the same instructions will work for a VCK190 or other Versal board as long as you have the prerequisite images (PDI and PSM firmware). Trenz distributes a pre-built hello world boot image for the TE0950. This image contains a baremetal program that continually prints hello onto serial. It includes a pre-built PDI, PLM, PSM firmware, and a baremetal hello program for A72 #0. We will create a new boot image with those pre-built components and our own PLM. If you’re doing this on another board, you’ll only need the PDI, PSM firmware, and the PLM you built. The baremetal program for the A72 is not required. For the TE0950, download their reference design package from https://shop.trenz-electronic.de/Download/?path=Trenz_Electronic/Development_Boards/TE0950/Reference_Design/2023.2/test_board. Use the “TE0950-test_board-vivado_2023.2-build_4_20240118225059.zip” file (238 MB). Unzip it to get a "test_board" folder. Create a new folder for the boot image creation: mkdir bootimage cd bootimage Create the boot image definition file: vim boot.bif Contents: the_ROM_image: { image { { type=bootimage, file=pdi.pdi } { type=bootloader, file=plm.elf } { core=psm, file=psmfw.elf } } image { id = 0x1c000000, name=apu_subsystem { core = a72-0, file=hello_a72.elf } } } If you don’t have a baremetal A72 program, leave the second "image {}" block out of the boot.bif. Copy over the files required to build the boot image Copy the TE0950 pre-built files from its "test_board" folder to this folder (note – for early TE0950 revisions with ES silicon, you may need to use the 23_1lse_8gb_es1 folder instead): cp ../test_board/prebuilt/hardware/23_1lse_8gb/test_board_23_1lse_8gb.pdi pdi.pdi cp ../test_board/prebuilt/software/23_1lse_8gb/psmfw.elf . cp ../test_board/prebuilt/software/23_1lse_8gb/hello_te0950.elf hello_a72.elf Also copy your own plm.elf into this folder. $ ls => pdi.pdi plm.elf psmfw.elf hello_a72.elf Build the boot image: source /tools/Xilinx/Vitis/2023.2/settings64.sh bootgen -arch versal -image boot.bif -w -o BOOT.BIN=> [INFO]   : Bootimage generated successfully The file BOOT.BIN now exists Ensure your board is in JTAG boot mode – here’s what the dip switch configuration should look like on a TE0950: S2 BOOT has all pins to the left, S1 JTAG has all pins except #2 to the left. Finally, program it to the device. xsct % % targets 1 (select 1  Versal xcve2302) % rst -system (needed if not a cold boot) % device program BOOT.BIN In the serial port, the device boots through your PLM (including printing the “This is my custom PLM” message added in the last post), and the baremetal A72 program (if provided) starts executing. References: https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/2037088327/Versal+Platform+Loader+and+Manager Header image from https://www.xilinx.com/products/silicon-devices/acap/versal-ai-core.html#video

  • Create a Versal PLM project and build it with XSCT

    This post describes creating and building a Versal PLM project from the command line with XSCT. If you'd like to do it graphically with Vitis, refer to this post instead. After creating the PLM, follow the instructions in this next post to create a bootable image from it and launch it on hardware. First, launch xsct and create a workspace for the new project $ mkdir /home/user/plmws $ source /tools/Xilinx/Vitis/2023.2/settings64.sh $ xsct% cd /home/user/plmws % setws . Next, create the PLM application project with your xsa % app create -name plm -hw /path/to/xsa_file.xsa -template "versal PLM" -os standalone -proc psv_pmc_0 This will create 3 folders: plm (contains the PLM application project, named plm because that’s what was specified as the “-name” arg above) plm_system (contains the system project) another folder containing the platform project (name varies based on the xsa) Finally, build the PLM % app build -name plm The file "plm/debug/plm.elf" now exists. You can edit the PLM source code and rebuild it. For example: vim /psv_pmc_0/standalone_domain/bsp/psv_pmc_0/libsrc/xilplmi_v1_9/src/xplmi.c In XPlmi_PrintPlmBanner(): on line 235, add a new print: XPlmi_Printf(DEBUG_PRINT_ALWAYS, "This is my custom PLM\n\r"); Rebuild the PLM by running "app build -name plm" in xsct. strings plm/debug/plm.elf | grep This => "This is my custom PLM" is found in the executable References: https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/2037088327/Versal+Platform+Loader+and+Manager Header image from https://www.xilinx.com/products/silicon-devices/acap/versal-ai-core.html#video

  • A Node.js URL Scraper on Windows 10

    This post shows how to build a Node.js URL scraper on Windows 10. 1. If you haven't, Install and Test Node.js on Windows 10 2. Open a terminal in C:\: a. Click on C: b. Right-click c. Click Open in Terminal Node can't handle paths with spaces, so working at the top of the C drive helps. 3. Paste: mkdir link-extractor cd link-extractor npm init -y # Initializes a new Node.js project npm install axios # Installs axios for HTTP requests npm install cheerio # Installs cheerio for HTML parsing npm install robots-parser # Install robots-parser to parse robots.txt 4. Paste: notepad extractLinks.js 5. Paste: const axios = require('axios'); const cheerio = require('cheerio'); const robotsParser = require('robots-parser'); async function fetchRobotsTxt(url) { const robotsUrl = new URL('/robots.txt', url).href; try { const response = await axios.get(robotsUrl); return response.data; } catch (error) { console.error('Error fetching robots.txt:', error); return null; } } async function isCrawlAllowed(url, userAgent) { const robotsTxt = await fetchRobotsTxt(url); if (!robotsTxt) return true; // No robots.txt found, assume allowed const robots = robotsParser(new URL('/robots.txt', url).href, robotsTxt); return robots.isAllowed(url, userAgent); } async function fetchLinks(url, userAgent = 'Node.js-bot') { if (!await isCrawlAllowed(url, userAgent)) { console.log('Crawling not allowed by robots.txt'); return []; } try { const response = await axios.get(url); const html = response.data; const $ = cheerio.load(html); const links = []; $('a').each((i, link) => { const href = $(link).attr('href'); const text = $(link).text().trim(); if (href) { links.push({ href, text }); } }); return links; } catch (error) { console.error('Error fetching or parsing the page:', error); return []; } } const url = "https://www.centennialsoftwaresolutions.com/post/a-nodejs-url-scraper-on-windows-10"; fetchLinks(url).then(links => { console.log('Links found:', links); }); 6. Paste: node .\extractLinks.js 7. You should see: PS C:\link-extractor> node .\extractLinks.js Links found: [ { href: 'https://www.centennialsoftwaresolutions.com', text: 'Home' }, { href: 'https://www.centennialsoftwaresolutions.com/services', text: 'Services' }, { href: 'https://www.centennialsoftwaresolutions.com/about', text: 'About' }, { href: 'https://www.centennialsoftwaresolutions.com/blog', text: 'Blog' }, ...

  • Fix 'Uploads are disabled' GitHub Error

    This post shows how to fix 'Uploads are disabled' in GitHub by enabling push access to a GitHub repository. This fixes the error: "Uploads are disabled. File uploads require push access to this repository." The Uploads are disabled Error Add the User to Your Repository 1. Add the person as a collaborator to your repository if they aren't already. a. Go to your repository on GitHub. b. Click on Settings in the toolbar. c. Click on 'Collaborators and teams' and 'Add people.' d. Enter the GitHub username of the person you want to add, give them 'Write access,' and click Add person to this repository. e. Have the invited person check their email, find the invite, and click on 'View invitation.' f. Have them click 'Accept invitation' g. They should see a page confirming that they have push access. Test from Web a. On this page, have them select the branch and click the + or... ...click Add file b. Click 'Upload files.' c. Create a file, add it, create a commit message, and click 'Commit changes.' d. Click on your branch and see your new file.

  • How To Clone, Create a Branch, and Contribute it to a GitHub Repository Using Git Bash on Windows

    This post shows how to Clone, Create a Branch, and Contribute it to a GitHub Repository Using Git Bash on Windows. It answers: How do I launch Git Bash? How do I get a repo, aka how do I clone a repo? How do I switch to a branch? How do I commit to a branch? How do I create a pull request? How do I launch Git Bash? Launch Git Bash: How do I get a repo, aka how do I clone a repo? 1. In Git Bash: cd /c 2. Clone Using the Web URL 3. In Git Bash: git clone https://github.com/centennialsoftwaresolutions/xrtc.git Output: Cloning into 'xrtc'... remote: Enumerating objects: 238, done. remote: Counting objects: 100% (238/238), done. remote: Compressing objects: 100% (179/179), done. remote: Total 238 (delta 111), reused 150 (delta 50), pack-reused 0 Receiving objects: 100% (238/238), 4.20 MiB | 8.96 MiB/s, done. Resolving deltas: 100% (111/111), done. How do I switch to a branch? 1. In Git Bash: cd xrtc git status Output: On branch main Your branch is up to date with 'origin/main'. nothing to commit, working tree clean 2. List Local Branches git branch # Lists local branches Output: Zach Pfeffer@LAPTOP-3MCNKKJO MINGW64 /c/xrtc (main) $ git branch # Lists local branches * main 3. List all Remote Branches git branch -r # Lists all remote branches Output: origin/HEAD -> origin/main origin/austin origin/main 4. Show What Origin Points To: git remote show origin Output: * remote origin Fetch URL: https://github.com/centennialsoftwaresolutions/xrtc.git Push URL: https://github.com/centennialsoftwaresolutions/xrtc.git HEAD branch: main Remote branches: austin tracked main tracked Local branch configured for 'git pull': main merges with remote main Local ref configured for 'git push': main pushes to main (up to date) 5. List Remote Branches: git branch -a # Lists all branches, including remote ones Output: * main remotes/origin/HEAD -> origin/main remotes/origin/austin remotes/origin/main 6. Check Out a Remote Branch: git checkout -b austin origin/austin Output: Switched to a new branch 'austin' Branch 'austin' set up to track remote branch 'austin' from 'origin'. 7. Check You're on the Branch: git status Output: On branch austin Your branch is up to date with 'origin/austin'. nothing to commit, working tree clean How do I Commit to a Branch, aka Contribute it to a GitHub Repository? 1. Commit and Push: cd /c/xrtc echo 'Test Push 2024-04-14' > testpush-2024-04-14.txt cat testpush-2024-04-14.txt git config --global user.email "help@centennialsoft.com" git config --global user.name "Get Help" git add testpush-2024-04-14.txt git status git add . git status git commit -m "Checking that I can push to austin" git pull origin austin git push origin austin Output: Zach Pfeffer@LAPTOP-3MCNKKJO MINGW64 /c/xrtc (austin) $ cd /c/xrtc Zach Pfeffer@LAPTOP-3MCNKKJO MINGW64 /c/xrtc (austin) $ echo 'Test Push 2024-04-14' > testpush-2024-04-14.txt Zach Pfeffer@LAPTOP-3MCNKKJO MINGW64 /c/xrtc (austin) $ cat testpush-2024-04-14.txt Test Push 2024-04-14 Zach Pfeffer@LAPTOP-3MCNKKJO MINGW64 /c/xrtc (austin) $ git config --global user.email "help@centennialsoft.com" Zach Pfeffer@LAPTOP-3MCNKKJO MINGW64 /c/xrtc (austin) $ git config --global user.name "Get Help" Zach Pfeffer@LAPTOP-3MCNKKJO MINGW64 /c/xrtc (austin) $ git add testpush-2024-04-14.txt Zach Pfeffer@LAPTOP-3MCNKKJO MINGW64 /c/xrtc (austin) $ git status On branch austin Your branch is up to date with 'origin/austin'. Changes to be committed: (use "git restore --staged ..." to unstage) new file: testpush-2024-04-14.txt Zach Pfeffer@LAPTOP-3MCNKKJO MINGW64 /c/xrtc (austin) $ git add . Zach Pfeffer@LAPTOP-3MCNKKJO MINGW64 /c/xrtc (austin) $ git status On branch austin Your branch is up to date with 'origin/austin'. Changes to be committed: (use "git restore --staged ..." to unstage) new file: testpush-2024-04-14.txt Zach Pfeffer@LAPTOP-3MCNKKJO MINGW64 /c/xrtc (austin) $ git commit -m "Checking that I can push to austin" [austin 6ae20d2] Checking that I can push to austin 1 file changed, 1 insertion(+) create mode 100644 testpush-2024-04-14.txt Zach Pfeffer@LAPTOP-3MCNKKJO MINGW64 /c/xrtc (austin) $ git pull origin austin From https://github.com/centennialsoftwaresolutions/xrtc * branch austin -> FETCH_HEAD Already up to date. Zach Pfeffer@LAPTOP-3MCNKKJO MINGW64 /c/xrtc (austin) $ git push origin austin Enumerating objects: 4, done. Counting objects: 100% (4/4), done. Delta compression using up to 12 threads Compressing objects: 100% (2/2), done. Writing objects: 100% (3/3), 315 bytes | 315.00 KiB/s, done. Total 3 (delta 1), reused 0 (delta 0), pack-reused 0 remote: Resolving deltas: 100% (1/1), completed with 1 local object. To https://github.com/centennialsoftwaresolutions/xrtc.git 1edcc99..6ae20d2 austin -> austin How do I create a pull request? 1. Create a Pull Request 2. Click the Branch 3. Click the 'Create pull request' Button 4. Add the Title and a Description and Click 'Create pull request' Output:

  • Lenovo Legion 5 15IMH05H Part Number 81Y6000EUS Factory ID JVHFC1 GeForce RTX 2060 Intel HM470

    This post lists original and saved versions of Lenovo Legion 5 15IMH05H Part Number 81Y6000EUS Factory ID JVHFC1 GeForce RTX 2060 Intel HM470 documentation. Lenovo Legion 5 15IMH05H Part Number 81Y6000EUS Specification https://psref.lenovo.com/product/legion/lenovo_legion_5_15imh05h?tab=spec https://drive.google.com/file/d/1ksVnIAe9Jayvt0znyqVD7g51OsGhsu_f/view?usp=sharing Setup Guide https://download.lenovo.com/consumer/mobiles_pub/legion_5_15_17_sg_en_da_fi_nb_sv_202004.pdf https://drive.google.com/file/d/1l9NKiD51GHxLyzZqJU46NAUVLPTSS30p/view?usp=sharing Lenovo Legion 5 15IMH05H Hardware Maintenance Manual https://download.lenovo.com/consumer/mobiles_pub/lenovo_legion_5_lenovo_legion_5p_hmm_v1.1.pdf https://drive.google.com/file/d/1kn1GA3lyiPwbYoYqKm-1PiztQ9qVaFpL/view?usp=sharing Lenovo Legion 5 15IMH05H PSREF (Product Specifications Reference) https://psref.lenovo.com/syspool/Sys/PDF/Legion/Lenovo_Legion_5_15IMH05H/Lenovo_Legion_5_15IMH05H_Spec.pdf https://drive.google.com/file/d/1ksVnIAe9Jayvt0znyqVD7g51OsGhsu_f/view?usp=sharing Lenovo_Legion_5_15IMH05H multi model 202404071148 https://psref.lenovo.com/product/legion/lenovo_legion_5_15imh05h?tab=spec https://docs.google.com/spreadsheets/d/1l-lQ0LnH9fvMw2dtaxPlrHLmR27XSABV/edit?usp=sharing&ouid=104422661029399872488&rtpof=true&sd=true Lenovo Legion 5 15IMH05H 81Y6000EUS PSREF (Product Specifications Reference) https://psref.lenovo.com/Detail/Legion/lenovo_legion_5_15imh05h?M=81Y6000EUS https://psref.lenovo.com/syspool/TempFile/cache/C90F3578-FE38-4B64-9518-B80D5BDE155E/Lenovo_Legion_5_15IMH05H_81Y6000EUS.pdf https://drive.google.com/file/d/1l1t5VXKPTrja15ty37DHZ0DeAQ-sdtXA/view?usp=sharing Lenovo Legion 5 Spec Table https://docs.google.com/spreadsheets/d/1l2Axwj40-FWLD99cOyQ3bzFE_RZpqBH6/edit?usp=sharing&ouid=104422661029399872488&rtpof=true&sd=true Lenovo Legion 5 15IMH05H 81Y6000EUS Specification PERFORMANCE Processor Intel® Core™ i7-10750H (6C / 12T, 2.6 / 5.0GHz, 12MB) Graphics NVIDIA® GeForce RTX™ 2060 6GB GDDR6 Chipset Intel® HM470 Memory 2x 8GB SO-DIMM DDR4-2933 Memory Slots Two DDR4 SO-DIMM slots, dual-channel capable Max Memory Up to 32GB DDR4-2933 offering Storage 1TB SSD M.2 2280 PCIe® 3.0x4 NVMe® + Empty HDD Bay Storage Support HDD/SSD mode: up to two drives, 1x 2.5" HDD + 1x M.2 SSD 2.5" HDD up to 2TB M.2 2242 SSD up to 512GB M.2 2280 SSD up to 1TB Storage Slot HDD/SSD mode: one 2.5" drive slot + one M.2 slot One 2.5" drive slot, supports 2.5" SATA HDD One M.2 2280 PCIe® Gen 3x4 slot, supports M.2 2242/2280 SSD Card Reader None Optical None Audio Chip High Definition (HD) Audio, Realtek® ALC3287 codec Speakers Stereo speakers, 2W x2, Dolby® Atmos® for gaming, Harman Speakers Camera 720p with Privacy Shutter Microphone 2x, Array Battery Integrated 60Wh Power Adapter 230W Slim Tip (3-pin) DESIGN Display 15.6" FHD (1920x1080) IPS 500nits Anti-glare, 240Hz, 100% sRGB, Dolby® Vision®, DC dimmer Touchscreen None Keyboard White Backlit, English (US) Touchpad Buttonless Mylar® surface multi-touch touchpad Case Color Phantom Black Surface Treatment Painting Case Material PC + ABS (Top), PC + ABS (Bottom) Dimensions (WxDxH) 363.06 x 259.61 x 23.57-26.1 mm (14.3 x 10.22 x 0.93-1.03 inches) Weight 2.46 kg (5.42 lbs) SOFTWARE Operating System Windows® 10 Home 64, English Bundled Software Office Trial CONNECTIVITY Ethernet 100/1000M WLAN + Bluetooth® Wi-Fi® 6 11ax, 2x2 + BT5.0 Standard Ports 1x USB-C® 3.2 Gen 1 (support data transfer and DisplayPort™ 1.2) 1x USB 3.2 Gen 1 (Always On) 3x USB 3.2 Gen 1 1x HDMI® 2.0 1x Headphone / microphone combo jack (3.5mm) 1x Ethernet (RJ-45) 1x Power connector SECURITY & PRIVACY Security Chip Firmware TPM 2.0 Fingerprint Reader None Physical Locks Kensington® Security Slot™ Other Security Camera privacy shutter SERVICE Base Warranty 1-year, Depot Included Upgrade 1Y Legion Ultimate Support IdeaPad® 5 embedded (5WS0Y99554) ACCESSORIES Bundled Accessories None CERTIFICATIONS Green Certifications ErP Lot 3 RoHS compliant MODEL TopSeller : No Announce Date : 2020-07-14 EAN / UPC / JAN : 194778313919 End of Support : 2026-05-27 GeForce RTX Graphics Cards https://www.nvidia.com/en-us/geforce/news/gfecnt/nvidia-geforce-rtx-2060/ Compare GeForce RTX 20 Series Specs https://www.nvidia.com/en-us/geforce/graphics-cards/compare/?section=compare-20 https://docs.google.com/spreadsheets/d/1K39u0E7kRojsyWBZozazS4hFga9RDA3KufaN5q9KBPQ/edit?usp=sharing NVIDIA Turing GPU Architecture https://images.nvidia.com/aem-dam/en-zz/Solutions/design-visualization/technologies/turing-architecture/NVIDIA-Turing-Architecture-Whitepaper.pdf https://drive.google.com/file/d/1kkbHzvqPgswB-4D6ELuLfscy5y6Q_r60/view?usp=sharing Intel® HM470 Chipset https://www.intel.com/content/www/us/en/products/docs/processors/core/core-technical-resources.html Intel® HM470 Specifications https://drive.google.com/file/d/1lQlClCL6vO8V-gNblhfNLwXBPbvnkTjY/view?usp=sharing Intel® HM470 Ordering & Compliance https://drive.google.com/file/d/1lGFYzZmdUm4BWaxMyppX07RfSba0sp_h/view?usp=sharing Intel® HM470 Compatible Products https://drive.google.com/file/d/1lPw6y6aZhDbZxeFhJF-XNIFfadi4kzQG/view?usp=sharing https://www.intel.com/content/www/us/en/products/sku/203697/intel-hm470-chipset/specifications.html

  • A Hello, World! Node.js Server on Windows 10

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