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Dec 14, 20232 min read
Extract (read back) configuration data from a Zynq-7000 FPGA
Introduction This article will show you how to use Vivado to read back the bitstream programmed into a physical Zynq-7000 device. The...
Apr 29, 20202 min read
VHDL to Gates and Routing on an FPGA with Vivado
This post shows how to examine the gates and routing used to implement a VHDL design and set of constraints on the Zynq-7000 of a ZC706....
Apr 28, 20202 min read
Light Up ZC706 LEDs Using Push Buttons with VHDL
This post shows how to use VHDL to connect SW7, SW9 and SW8 to LCR PL GPIO LEDS using VHDL. This post picks up right after [link]....
Apr 19, 20201 min read
Create a ZC706 Vivado Project
This post lists the steps to create a Vivado project for a ZC706 and to check the version of the ZC706 you're using. Versions Used Vivado...
Oct 8, 20191 min read
Fix petalinux-boot “tcf_send_command tcfchan#0 RunControl” Boot Failure on ZC706
This post shows a way to fix a petalinux-boot problem whose symptom is a “tcf_send_command tcfchan#0 RunControl” message during boot....
Aug 16, 20199 min read
2018.2.2 Xilinx Linux Dev for the ZC706 on Win7 SP1 via VirtualBox 6.0.10
These instructions help you install all the components to do Linux development for the ZC706 (containing a XC7Z045 FFG900 – 2 SoC,...
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