ZCU102 Memory Map
This post's table contains: (1) A memory map of the Zynq UltraScale+ MPSoC, (2) An overlay of the Linux kernel, U-Boot, PMUFW, FSBL, and...
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Zach Pfeffer
- Jun 14
- 3 min
Enable socat Using Petainux 2019.1 and Test it on the ZCU102
This post shows how to enable socat in a PetaLinux 2019.1 build.
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Zach Pfeffer
- May 15
- 16 min
Successful 2019.1 PetaLinux Linux kernel JTAG Boot Log
This post lists a successful JTAG boot of the Linux kernel. This can be useful if a build doesn't boot and a developer is trying to...
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edaskill
- Mar 31
- 1 min
U-Boot compile errors, MicroBlaze, and problems with Vivado 2020.2
In this post I attempted following this guide on newer version of Vivado. (and different FPGA) Preface Main differences between 2020.2...
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edaskill
- Mar 20
- 1 min
Xilinx MicroBlaze 2020.2 links
MicroBlaze information is very sparse. This warranted a short list of relevant links below Docs: 2020.2 MicroBlaze Processor Reference...
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edaskill
- Mar 12
- 3 min
MicroBlaze TMR 2019.1
In this post I will briefly explain how to put 3 MicroBlaze soft-core CPUs on Nexys 4 DDR FPGA (Xilinx Artix 7 FPGA) and use Triple...
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edaskill
- Feb 28
- 1 min
Save space between Vivado versions
or Redundant Data Find... It's often that developers need to use multiple versions of a tool. In this case: Vivado. IDEs can become quite...
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Zach Pfeffer
- Feb 10
- 1 min
Warning: petalinux-config deletes files
This post shares a warning that you may lose your work if you run petalinux-config --get-hw-description in an existing PetaLinux project....
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Zach Pfeffer
- Dec 11, 2020
- 1 min
2019.1 FSBL Command Line Option Decode Example: aarch64-none-elf-gcc ... "../src/xfsbl_main.c"
This post shows how to decode what each command-line option used in aarch64-none-elf-gcc -DARMA53_64 -Wall -O0 -g3...
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Zach Pfeffer
- Dec 4, 2020
- 3 min
Set bootargs in a PetaLinux 2019.1 Build
This post shows how PetaLinux Tools 2019.1 lays out device tree files and how to edit bootargs. Assumptions You've installed PetaLinux...
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Zach Pfeffer
- Dec 2, 2020
- 1 min
HW-Z1-ZCU102, REVISION 1.0, DDR4 PS, Kingston, 4GB 1Rx8 PC4-2133P-TD1-11
This post contains a picture of the Kingston, 4GB 1Rx8 PC4-2133P-TD1-11 SODIMM in REVISION 1.0 of HW-Z1-ZCU102. The Kingston part number...
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Zach Pfeffer
- Dec 1, 2020
- 2 min
How do I run the Xilinx SDK 2019.1 from the command line on Linux?
This post shows how to run the Xilinx SDK from the command line. It also shows you how to run the SDK in batch mode. Steps Step #1: Open...
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Zach Pfeffer
- Nov 24, 2020
- 15 min
PetaLinux 2019.1 on Debian 10.3 Running on VMWare Workstation 14 Player Debug Log
How to fix: "E: Unable to locate package" on Debian 10.3
How to fix: "E: Unable to locate package zlib1g:i386" on Debian 10.3
...
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jeromehittle
- Sep 14, 2020
- 7 min
Zynq-7000 + AXI Slave CDMA controller on a ZC702
This post lists step-by-step instructions for creating an AXI slave Central Data Management Access (CDMA) controller, integrating the...
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Zach Pfeffer
- May 9, 2020
- 2 min
FreeRTOS Hello, World! on Xilinx's ZCU102 Zynq UltraScale+ MPSoC's R5 Using the 2019.1 SDK
A) Click File, New, Application Project
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Zach Pfeffer
- May 8, 2020
- 2 min
Create a ZCU102 PS in Vivado 2019.1
Step #1: Start Vivado, Step #2: Click Create Project...
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Zach Pfeffer
- May 7, 2020
- 1 min
Start Installing Xilinx's Vivado 2019.1 on Windows 7 from the Windows Self Extracting Web Install
Step 1: Double click Xilinx_Vivado_SDK_Web_2019.1_0524_1430_Win64.exe...
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Zach Pfeffer
- May 7, 2020
- 1 min
Find and Download Xilinx's Vivado 2019.1 Windows Self Extracting Web Installer
Go to xilinx.com, click "Developers", click "Download the Latest Xilinx Tools" or go to https://www.xilinx.com/support/download.html
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Zach Pfeffer
- Apr 30, 2020
- 2 min
VHDL to Gates and Routing on an FPGA
This post shows how to examine the gates and routing used to implement a VHDL design and set of constraints on the Zynq-7000 of a ZC706....
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Zach Pfeffer
- Apr 29, 2020
- 2 min
Light Up ZC706 LEDs Using Push Buttons with VHDL
This post shows how to use VHDL to connect SW7, SW9 and SW8 to LCR PL GPIO LEDS using VHDL. This post picks up right after [link]....
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