Build Steps PetaLinux Tools Build Guide for Ultra96-V2 Avnet out of box BSP 2018.3 Build First Stage Bootloader (FSBL) for Ultra96 V2...

This post demonstrates how to create and debug a ZCU102 FSBL and FSBL BSP using Xilinx's 2019.2 Vitis, previously known as the Xilinx...

This post demonstrates an install of Vitis 2019.2 on Ubuntu 16.04.5. Steps #1 Go to https://www.xilinx.com/support/download/index.html/co...

This post shows how to compile and install Boost, compile the Boost "Hello, World!" project using the Xilinx SDK aarch64 toolchain, and...

This post will show you how to use device tree overlays in Linux, and discusses Petalinux-specific configuration requirements and bugs....

This post shows how to check what port the tcf-agent is listening on. Commands were run on a ZCU102 booting a 2019.1 PetaLinux built...

This post shows how to show whitespace characters in the 2019.1 Xilinx SDK. 1. Click a file 2. Right-click on the file in the editor 3....

This post shows how to enable symbols in a 2019.1 Xilinx BSP. Remember! You can enable syms in the fsbl or the fsbl_bsp, but not both....

This post demonstrates how you can manually add an embeddedsw driver to an XSDK FSBL BSP. Steps XP=~/xsdk/SDK/2019.1...

This post demonstrates HOWTO rebuild and test the 2019.1 Xilinx FSBL

This post describes how to install and run Docker and build PetaLinux 2018.1 in a Docker container.

This post's table contains: (1) A memory map of the Zynq UltraScale+ MPSoC, (2) An overlay of the Linux kernel, U-Boot, PMUFW, FSBL, and...

This post shows how to enable socat in a PetaLinux 2019.1 build.

This post lists a successful JTAG boot of the Linux kernel. This can be useful if a build doesn't boot and a developer is trying to...

In this post I attempted following this guide on newer version of Vivado. (and different FPGA) Preface Main differences between 2020.2...

MicroBlaze information is very sparse. This warranted a short list of relevant links below Docs: 2020.2 MicroBlaze Processor Reference...

In this post I will briefly explain how to put 3 MicroBlaze soft-core CPUs on Nexys 4 DDR FPGA (Xilinx Artix 7 FPGA) and use Triple...

or Redundant Data Find... It's often that developers need to use multiple versions of a tool. In this case: Vivado. IDEs can become quite...

This post shares a warning that you may lose your work if you run petalinux-config --get-hw-description in an existing PetaLinux project....

This post shows how to decode what each command-line option used in aarch64-none-elf-gcc -DARMA53_64 -Wall -O0 -g3...