Size of Each 2019.1 FSBL Code Include Option


This post lists the output of aarch64-none-elf-size fsbldebug.elf |tee "fsbldebug.elf.size" for each value of FSBL code include options in xfsbl_config.h. Excluding these items may be required if you are trying to debug the FSBL since the default configuration will not build if debug is enabled.


Build Flags and Options Used


ARM v8 gcc compiler > Miscellaneous

set to:

-c -fmessage-length=0 -MT"$@" -Og


standalone > zynqmp_fsbl_bsp

set to:

false


Sizes


Default (not buildable)


#define FSBL_NAND_EXCLUDE_VAL (0U)

#define FSBL_QSPI_EXCLUDE_VAL (0U)

#define FSBL_SD_EXCLUDE_VAL (0U)

#define FSBL_SECURE_EXCLUDE_VAL (0U)

#define FSBL_BS_EXCLUDE_VAL (0U)

#define FSBL_EARLY_HANDOFF_EXCLUDE_VAL (1U)

#define FSBL_WDT_EXCLUDE_VAL (0U)

#define FSBL_PERF_EXCLUDE_VAL (1U)

#define FSBL_A53_TCM_ECC_EXCLUDE_VAL (1U)

#define FSBL_PL_CLEAR_EXCLUDE_VAL (1U)

#define FSBL_USB_EXCLUDE_VAL (1U)

#define FSBL_PROT_BYPASS_EXCLUDE_VAL (1U)

#define FSBL_PARTITION_LOAD_EXCLUDE_VAL (0U)

#define FSBL_FORCE_ENC_EXCLUDE_VAL (0U)

#define FSBL_DDR_SR_EXCLUDE_VAL (1U)


Error:


Building target: fsbldebug.elf
Invoking: ARM v8 gcc linker
aarch64-none-elf-gcc -n -Wl,-T -Wl,../src/lscript.ld -L../../fsbldebug_bsp/psu_cortexa53_0/lib -o "fsbldebug.elf"  ./src/psu_init.o ./src/xfsbl_authentication.o ./src/xfsbl_board.o ./src/xfsbl_bs.o ./src/xfsbl_csu_dma.o ./src/xfsbl_ddr_init.o ./src/xfsbl_dfu_util.o ./src/xfsbl_exit.o ./src/xfsbl_handoff.o ./src/xfsbl_hooks.o ./src/xfsbl_image_header.o ./src/xfsbl_initialization.o ./src/xfsbl_main.o ./src/xfsbl_misc.o ./src/xfsbl_misc_drivers.o ./src/xfsbl_nand.o ./src/xfsbl_partition_load.o ./src/xfsbl_plpartition_valid.o ./src/xfsbl_qspi.o ./src/xfsbl_rsa_sha.o ./src/xfsbl_sd.o ./src/xfsbl_translation_table.o ./src/xfsbl_usb.o   -Wl,--start-group,-lxil,-lgcc,-lc,--end-group -Wl,--start-group,-lxilffs,-lxil,-lgcc,-lc,--end-group -Wl,--start-group,-lxilsecure,-lxil,-lgcc,-lc,--end-group -Wl,--start-group,-lxilpm,-lxil,-lgcc,-lc,--end-group
/tools/Xilinx/SDK/2019.1/gnu/aarch64/lin/aarch64-none/bin/../lib/gcc/aarch64-none-elf/8.2.0/../../../../aarch64-none-elf/bin/ld: address 0xfffeadc8 of fsbldebug.elf section `.dup_data' is not within region `psu_ocm_ram_0_S_AXI_BASEADDR'
makefile:36: recipe for target 'fsbldebug.elf' failed
/tools/Xilinx/SDK/2019.1/gnu/aarch64/lin/aarch64-none/bin/../lib/gcc/aarch64-none-elf/8.2.0/../../../../aarch64-none-elf/bin/ld: address 0xfffeadc8 of fsbldebug.elf section `.dup_data' is not within region `psu_ocm_ram_0_S_AXI_BASEADDR'
/tools/Xilinx/SDK/2019.1/gnu/aarch64/lin/aarch64-none/bin/../lib/gcc/aarch64-none-elf/8.2.0/../../../../aarch64-none-elf/bin/ld: address 0xfffeadc8 of fsbldebug.elf section `.dup_data' is not within region `psu_ocm_ram_0_S_AXI_BASEADDR'
/tools/Xilinx/SDK/2019.1/gnu/aarch64/lin/aarch64-none/bin/../lib/gcc/aarch64-none-elf/8.2.0/../../../../aarch64-none-elf/bin/ld: address 0xfffeadc8 of fsbldebug.elf section `.dup_data' is not within region `psu_ocm_ram_0_S_AXI_BASEADDR'
/tools/Xilinx/SDK/2019.1/gnu/aarch64/lin/aarch64-none/bin/../lib/gcc/aarch64-none-elf/8.2.0/../../../../aarch64-none-elf/bin/ld: address 0xfffeadc8 of fsbldebug.elf section `.dup_data' is not within region `psu_ocm_ram_0_S_AXI_BASEADDR'
/tools/Xilinx/SDK/2019.1/gnu/aarch64/lin/aarch64-none/bin/../lib/gcc/aarch64-none-elf/8.2.0/../../../../aarch64-none-elf/bin/ld: section .handoff_params VMA [00000000fffe9e00,00000000fffe9e87] overlaps section .dup_data VMA [00000000fffe9a00,00000000fffeadc7]
collect2: error: ld returned 1 exit status
make: *** [fsbldebug.elf] Error 1

References

  • SDK - How to debug FSBL code [link]

  • Zynq UltraScale+ FSBL [link]

  • ZynqMP FSBL Build Failure with FSBL_DEBUG_INFO [link]

  • text, data and bss: Code and Data Size Explained [link]

  • HTML Tables generator [link]

  • The Xilinx graphic is from [link]

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